From 9a4bbbbc971be857245cf6d38bab6ab7e68efa13 Mon Sep 17 00:00:00 2001 From: Matthias Biermann Date: Wed, 12 Feb 2025 18:23:19 +0100 Subject: [PATCH] clean Vivado Project dma_bare_metal --- .../dma_bare_metal.cache/wt/project.wpc | 3 - .../dma_bare_metal_syn_1.bda | 318 ------------------ .../dma_bare_metal.hw/dma_bare_metal.lpr | 7 - .../dma_bare_metal_syn_1.bda | 318 ------------------ 4 files changed, 646 deletions(-) delete mode 100644 Hardware/dma_bare_metal/dma_bare_metal.cache/wt/project.wpc delete mode 100644 Hardware/dma_bare_metal/dma_bare_metal.gen/sources_1/bd/dma_bare_metal_syn_1/dma_bare_metal_syn_1.bda delete mode 100644 Hardware/dma_bare_metal/dma_bare_metal.hw/dma_bare_metal.lpr delete mode 100644 Hardware/dma_bare_metal/dma_bare_metal.srcs/sources_1/bd/dma_bare_metal_syn_1/dma_bare_metal_syn_1.bda diff --git a/Hardware/dma_bare_metal/dma_bare_metal.cache/wt/project.wpc b/Hardware/dma_bare_metal/dma_bare_metal.cache/wt/project.wpc deleted file mode 100644 index 9b34209..0000000 --- a/Hardware/dma_bare_metal/dma_bare_metal.cache/wt/project.wpc +++ /dev/null @@ -1,3 +0,0 @@ -version:1 -6d6f64655f636f756e7465727c4755494d6f6465:1 -eof: diff --git a/Hardware/dma_bare_metal/dma_bare_metal.gen/sources_1/bd/dma_bare_metal_syn_1/dma_bare_metal_syn_1.bda b/Hardware/dma_bare_metal/dma_bare_metal.gen/sources_1/bd/dma_bare_metal_syn_1/dma_bare_metal_syn_1.bda deleted file mode 100644 index 2e858cd..0000000 --- a/Hardware/dma_bare_metal/dma_bare_metal.gen/sources_1/bd/dma_bare_metal_syn_1/dma_bare_metal_syn_1.bda +++ /dev/null @@ -1,318 +0,0 @@ -{ - "graphjs": { - "version": "1.0", - "keys": [ - { - "abrv": "VH", - "name": "vert_hid", - "type": "int", - "for": "node" - }, - { - "abrv": "VM", - "name": "vert_name", - "type": "string", - "for": "node" - }, - { - "abrv": "VT", - "name": "vert_type", - "type": "string", - "for": "node" - }, - { - "abrv": "BA", - "name": "base_addr", - "type": "string", - "for": "node" - }, - { - "abrv": "HA", - "name": "high_addr", - "type": "string", - "for": "node" - }, - { - "abrv": "BP", - "name": "base_param", - "type": "string", - "for": "node" - }, - { - "abrv": "HP", - "name": "high_param", - "type": "string", - "for": "node" - }, - { - "abrv": "MA", - "name": "master_addrspace", - "type": "string", - "for": "node" - }, - { - "abrv": "MX", - "name": "master_instance", - "type": "string", - "for": "node" - }, - { - "abrv": "MI", - "name": "master_interface", - "type": "string", - "for": "node" - }, - { - "abrv": "MS", - "name": "master_segment", - "type": "string", - "for": "node" - }, - { - "abrv": "MV", - "name": "master_vlnv", - "type": "string", - "for": "node" - }, - { - "abrv": "SX", - "name": "slave_instance", - "type": "string", - "for": "node" - }, - { - "abrv": "SI", - "name": "slave_interface", - "type": "string", - "for": "node" - }, - { - "abrv": "MM", - "name": "slave_memmap", - "type": "string", - "for": "node" - }, - { - "abrv": "SS", - "name": "slave_segment", - "type": "string", - "for": "node" - }, - { - "abrv": "SV", - "name": "slave_vlnv", - "type": "string", - "for": "node" - }, - { - "abrv": "TM", - "name": "memory_type", - "type": "string", - "for": "node" - }, - { - "abrv": "TU", - "name": "usage_type", - "type": "string", - "for": "node" - }, - { - "abrv": "LT", - "name": "lock_type", - "type": "string", - "for": "node" - }, - { - "abrv": "BT", - "name": "boot_type", - "type": "string", - "for": "node" - }, - { - "abrv": "EH", - "name": "edge_hid", - "type": "int", - "for": "edge" - } - ], - "vertice_type_order": [ - { - "abrv": "BC", - "desc": "Block Container" - }, - { - "abrv": "PR", - "desc": "Parital Reference" - }, - { - "abrv": "VR", - "desc": "Variant" - }, - { - "abrv": "PM", - "desc": "Variant Permutations" - }, - { - "abrv": "CX", - "desc": "Boundary Connection" - }, - { - "abrv": "AC", - "desc": "Assignment Coordinate" - }, - { - "abrv": "ACE", - "desc": "Excluded Assign Coordinate" - }, - { - "abrv": "APX", - "desc": "Boundary Aperture" - }, - { - "abrv": "CIP", - "desc": "High level Processing System" - } - ], - "vertices": { - "V0": { - "VM": "dma_bare_metal_syn_1", - "VT": "BC" - }, - "V1": { - "VH": "2", - "VM": "dma_bare_metal_syn_1", - "VT": "VR" - }, - "V2": { - "VH": "2", - "VT": "PM", - "TU": "active" - }, - "V3": { - "VT": "AC", - "BA": "0x00000000", - "HA": "0x3FFFFFFF", - "BP": "C_BASEADDR", - "HP": "C_HIGHADDR", - "MA": "M_AXI", - "MX": "/axi_2d_mmvs_0", - "MI": "M_AXI", - "MS": "SEG_processing_system7_0_ACP_DDR_LOWOCM", - "MV": "Gehrke:user:axi_2d_mmvs:1.0", - "SX": "/processing_system7_0", - "SI": "S_AXI_ACP", - "SS": "ACP_DDR_LOWOCM", - "SV": "xilinx.com:ip:processing_system7:5.5", - "TM": "both", - "TU": "memory" - }, - "V4": { - "VT": "AC", - "BA": "0x40000000", - "HA": "0x7FFFFFFF", - "BP": "C_BASEADDR", - "HP": "C_HIGHADDR", - "MA": "M_AXI", - "MX": "/axi_2d_mmvs_0", - "MI": "M_AXI", - "MS": "SEG_processing_system7_0_ACP_M_AXI_GP0", - "MV": "Gehrke:user:axi_2d_mmvs:1.0", - "SX": "/processing_system7_0", - "SI": "S_AXI_ACP", - "SS": "ACP_M_AXI_GP0", - "SV": "xilinx.com:ip:processing_system7:5.5", - "TM": "both", - "TU": "register" - }, - "V5": { - "VT": "AC", - "BA": "0x43C10000", - "HA": "0x43C1FFFF", - "BP": "C_BASEADDR", - "HP": "C_HIGHADDR", - "MA": "Data", - "MX": "/processing_system7_0", - "MI": "M_AXI_GP0", - "MS": "SEG_axi_2d_mmvs_0_reg0", - "MV": "xilinx.com:ip:processing_system7:5.5", - "SX": "/axi_2d_mmvs_0", - "SI": "S_AXIL", - "SS": "reg0", - "SV": "Gehrke:user:axi_2d_mmvs:1.0", - "TM": "both", - "TU": "register" - }, - "V6": { - "VT": "AC", - "BA": "0xE0000000", - "HA": "0xE03FFFFF", - "BP": "C_BASEADDR", - "HP": "C_HIGHADDR", - "MA": "M_AXI", - "MX": "/axi_2d_mmvs_0", - "MI": "M_AXI", - "MS": "SEG_processing_system7_0_ACP_IOP", - "MV": "Gehrke:user:axi_2d_mmvs:1.0", - "SX": "/processing_system7_0", - "SI": "S_AXI_ACP", - "SS": "ACP_IOP", - "SV": "xilinx.com:ip:processing_system7:5.5", - "TM": "both", - "TU": "register" - }, - "V7": { - "VT": "AC", - "BA": "0xFC000000", - "HA": "0xFCFFFFFF", - "BP": "C_BASEADDR", - "HP": "C_HIGHADDR", - "MA": "M_AXI", - "MX": "/axi_2d_mmvs_0", - "MI": "M_AXI", - "MS": "SEG_processing_system7_0_ACP_QSPI_LINEAR", - "MV": "Gehrke:user:axi_2d_mmvs:1.0", - "SX": "/processing_system7_0", - "SI": "S_AXI_ACP", - "SS": "ACP_QSPI_LINEAR", - "SV": "xilinx.com:ip:processing_system7:5.5", - "TM": "both", - "TU": "memory" - } - }, - "edges": [ - { - "src": "V0", - "trg": "V1" - }, - { - "src": "V1", - "trg": "V2" - }, - { - "src": "V3", - "trg": "V2", - "EH": "2" - }, - { - "src": "V4", - "trg": "V2", - "EH": "2" - }, - { - "src": "V5", - "trg": "V2", - "EH": "2" - }, - { - "src": "V6", - "trg": "V2", - "EH": "2" - }, - { - "src": "V7", - "trg": "V2", - "EH": "2" - } - ] - } -} diff --git a/Hardware/dma_bare_metal/dma_bare_metal.hw/dma_bare_metal.lpr b/Hardware/dma_bare_metal/dma_bare_metal.hw/dma_bare_metal.lpr deleted file mode 100644 index 34359e9..0000000 --- a/Hardware/dma_bare_metal/dma_bare_metal.hw/dma_bare_metal.lpr +++ /dev/null @@ -1,7 +0,0 @@ - - - - - - - diff --git a/Hardware/dma_bare_metal/dma_bare_metal.srcs/sources_1/bd/dma_bare_metal_syn_1/dma_bare_metal_syn_1.bda b/Hardware/dma_bare_metal/dma_bare_metal.srcs/sources_1/bd/dma_bare_metal_syn_1/dma_bare_metal_syn_1.bda deleted file mode 100644 index 2e858cd..0000000 --- a/Hardware/dma_bare_metal/dma_bare_metal.srcs/sources_1/bd/dma_bare_metal_syn_1/dma_bare_metal_syn_1.bda +++ /dev/null @@ -1,318 +0,0 @@ -{ - "graphjs": { - "version": "1.0", - "keys": [ - { - "abrv": "VH", - "name": "vert_hid", - "type": "int", - "for": "node" - }, - { - "abrv": "VM", - "name": "vert_name", - "type": "string", - "for": "node" - }, - { - "abrv": "VT", - "name": "vert_type", - "type": "string", - "for": "node" - }, - { - "abrv": "BA", - "name": "base_addr", - "type": "string", - "for": "node" - }, - { - "abrv": "HA", - "name": "high_addr", - "type": "string", - "for": "node" - }, - { - "abrv": "BP", - "name": "base_param", - "type": "string", - "for": "node" - }, - { - "abrv": "HP", - "name": "high_param", - "type": "string", - "for": "node" - }, - { - "abrv": "MA", - "name": "master_addrspace", - "type": "string", - "for": "node" - }, - { - "abrv": "MX", - "name": "master_instance", - "type": "string", - "for": "node" - }, - { - "abrv": "MI", - "name": "master_interface", - "type": "string", - "for": "node" - }, - { - "abrv": "MS", - "name": "master_segment", - "type": "string", - "for": "node" - }, - { - "abrv": "MV", - "name": "master_vlnv", - "type": "string", - "for": "node" - }, - { - "abrv": "SX", - "name": "slave_instance", - "type": "string", - "for": "node" - }, - { - "abrv": "SI", - "name": "slave_interface", - "type": "string", - "for": "node" - }, - { - "abrv": "MM", - "name": "slave_memmap", - "type": "string", - "for": "node" - }, - { - "abrv": "SS", - "name": "slave_segment", - "type": "string", - "for": "node" - }, - { - "abrv": "SV", - "name": "slave_vlnv", - "type": "string", - "for": "node" - }, - { - "abrv": "TM", - "name": "memory_type", - "type": "string", - "for": "node" - }, - { - "abrv": "TU", - "name": "usage_type", - "type": "string", - "for": "node" - }, - { - "abrv": "LT", - "name": "lock_type", - "type": "string", - "for": "node" - }, - { - "abrv": "BT", - "name": "boot_type", - "type": "string", - "for": "node" - }, - { - "abrv": "EH", - "name": "edge_hid", - "type": "int", - "for": "edge" - } - ], - "vertice_type_order": [ - { - "abrv": "BC", - "desc": "Block Container" - }, - { - "abrv": "PR", - "desc": "Parital Reference" - }, - { - "abrv": "VR", - "desc": "Variant" - }, - { - "abrv": "PM", - "desc": "Variant Permutations" - }, - { - "abrv": "CX", - "desc": "Boundary Connection" - }, - { - "abrv": "AC", - "desc": "Assignment Coordinate" - }, - { - "abrv": "ACE", - "desc": "Excluded Assign Coordinate" - }, - { - "abrv": "APX", - "desc": "Boundary Aperture" - }, - { - "abrv": "CIP", - "desc": "High level Processing System" - } - ], - "vertices": { - "V0": { - "VM": "dma_bare_metal_syn_1", - "VT": "BC" - }, - "V1": { - "VH": "2", - "VM": "dma_bare_metal_syn_1", - "VT": "VR" - }, - "V2": { - "VH": "2", - "VT": "PM", - "TU": "active" - }, - "V3": { - "VT": "AC", - "BA": "0x00000000", - "HA": "0x3FFFFFFF", - "BP": "C_BASEADDR", - "HP": "C_HIGHADDR", - "MA": "M_AXI", - "MX": "/axi_2d_mmvs_0", - "MI": "M_AXI", - "MS": "SEG_processing_system7_0_ACP_DDR_LOWOCM", - "MV": "Gehrke:user:axi_2d_mmvs:1.0", - "SX": "/processing_system7_0", - "SI": "S_AXI_ACP", - "SS": "ACP_DDR_LOWOCM", - "SV": "xilinx.com:ip:processing_system7:5.5", - "TM": "both", - "TU": "memory" - }, - "V4": { - "VT": "AC", - "BA": "0x40000000", - "HA": "0x7FFFFFFF", - "BP": "C_BASEADDR", - "HP": "C_HIGHADDR", - "MA": "M_AXI", - "MX": "/axi_2d_mmvs_0", - "MI": "M_AXI", - "MS": "SEG_processing_system7_0_ACP_M_AXI_GP0", - "MV": "Gehrke:user:axi_2d_mmvs:1.0", - "SX": "/processing_system7_0", - "SI": "S_AXI_ACP", - "SS": "ACP_M_AXI_GP0", - "SV": "xilinx.com:ip:processing_system7:5.5", - "TM": "both", - "TU": "register" - }, - "V5": { - "VT": "AC", - "BA": "0x43C10000", - "HA": "0x43C1FFFF", - "BP": "C_BASEADDR", - "HP": "C_HIGHADDR", - "MA": "Data", - "MX": "/processing_system7_0", - "MI": "M_AXI_GP0", - "MS": "SEG_axi_2d_mmvs_0_reg0", - "MV": "xilinx.com:ip:processing_system7:5.5", - "SX": "/axi_2d_mmvs_0", - "SI": "S_AXIL", - "SS": "reg0", - "SV": "Gehrke:user:axi_2d_mmvs:1.0", - "TM": "both", - "TU": "register" - }, - "V6": { - "VT": "AC", - "BA": "0xE0000000", - "HA": "0xE03FFFFF", - "BP": "C_BASEADDR", - "HP": "C_HIGHADDR", - "MA": "M_AXI", - "MX": "/axi_2d_mmvs_0", - "MI": "M_AXI", - "MS": "SEG_processing_system7_0_ACP_IOP", - "MV": "Gehrke:user:axi_2d_mmvs:1.0", - "SX": "/processing_system7_0", - "SI": "S_AXI_ACP", - "SS": "ACP_IOP", - "SV": "xilinx.com:ip:processing_system7:5.5", - "TM": "both", - "TU": "register" - }, - "V7": { - "VT": "AC", - "BA": "0xFC000000", - "HA": "0xFCFFFFFF", - "BP": "C_BASEADDR", - "HP": "C_HIGHADDR", - "MA": "M_AXI", - "MX": "/axi_2d_mmvs_0", - "MI": "M_AXI", - "MS": "SEG_processing_system7_0_ACP_QSPI_LINEAR", - "MV": "Gehrke:user:axi_2d_mmvs:1.0", - "SX": "/processing_system7_0", - "SI": "S_AXI_ACP", - "SS": "ACP_QSPI_LINEAR", - "SV": "xilinx.com:ip:processing_system7:5.5", - "TM": "both", - "TU": "memory" - } - }, - "edges": [ - { - "src": "V0", - "trg": "V1" - }, - { - "src": "V1", - "trg": "V2" - }, - { - "src": "V3", - "trg": "V2", - "EH": "2" - }, - { - "src": "V4", - "trg": "V2", - "EH": "2" - }, - { - "src": "V5", - "trg": "V2", - "EH": "2" - }, - { - "src": "V6", - "trg": "V2", - "EH": "2" - }, - { - "src": "V7", - "trg": "V2", - "EH": "2" - } - ] - } -}