M1: Fehler in Architecture behoben

This commit is contained in:
Matthias Biermann
2024-10-12 23:53:30 +02:00
parent 1da70e5a1c
commit c1a22ea529
+14 -5
View File
@@ -74,11 +74,20 @@ begin
variable cntVal : unsigned(2 downto 0) := (others=>'0');
begin
wait until rising_edge(clk);
if reset = '1' or cntVal = 0 then
if reset = '1' then
cntVal := to_unsigned(7, 3);
CntBitsTC <= '0';
elsif CntBitsEn = '1' then
cntVal := cntVal - 1;
if cntVal = 0 then
cntVal := to_unsigned(7, 3);
else
cntVal := cntVal - 1;
end if;
end if;
if cntVal = 0 then
CntBitsTC <= '1';
else
CntBitsTC <= '0';
end if;
end process;
@@ -148,6 +157,7 @@ begin
state_next <= S_START;
elsif CntSckTc = '1' then
state_next <= S_STEP_4;
CntBitsEn <= '1';
elsif CntSckTc = '0' then
state_next <= S_STEP_3;
end if;
@@ -158,8 +168,7 @@ begin
state_next <= S_STEP_4;
elsif CntSckTc = '1' and CntBitsTC = '0' then
state_next <= S_STEP_1;
RegDataLd <= '1';
CntBitsEn <= '1';
RegDataShift <= '1';
elsif CntSckTc = '1' and CntBitsTC = '1' then
if CtrlBits = "10" then
state_next <= S_DEAD_END;