M1: spi_rom_control Architecture (mit Fehler)
This commit is contained in:
Matthias Biermann
@@ -56,7 +56,7 @@ begin
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port map (
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clk => clk,
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addr => addr,
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dout => data
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dout => data_rom
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);
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Control_Inst: entity work.spi_rom_control
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@@ -73,6 +73,6 @@ begin
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m_data => data,
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m_valid => valid,
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m_ready => ready
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)
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);
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end rtl;
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@@ -33,12 +33,13 @@ begin
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begin
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reset <= '0' after 100 * clk_half_period;
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wait for 45 us;
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wait until rising_edge(clk);
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reset <= '1';
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wait for 1 us;
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wait until rising_edge(clk);
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reset <= '0';
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-- wait for 45 us;
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-- wait until rising_edge(clk);
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-- reset <= '1';
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-- wait for 1 us;
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-- wait until rising_edge(clk);
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-- reset <= '0';
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wait;
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end process;
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dut: entity work.spi2display
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@@ -18,18 +18,24 @@ entity spi_rom_control is
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-- Streaming Interface spi_transmitter
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m_data : out std_logic_vector(7 downto 0);
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m_valid : out std_logic;
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m_ready : in std_logic;
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m_ready : in std_logic
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);
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end entity;
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architecture rtl of spi_rom_control is
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-- Steuersignale fuer Zustandsmaschine
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signal CtrlBits : std_logic_vector(1 downto 0);
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signal CntAddrEn : std_logic;
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signal CntAddrRst : std_logic;
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signal RegDataEn : std_logic;
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-- Finite State Machine
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type state_t is (S_ReadRom, S_ProvideData, S_DeadEnd, S_ERROR);
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signal state : state_t := S_ReadRom;
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signal state_next : state_t;
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begin
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RegData: process
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@@ -37,9 +43,10 @@ begin
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begin
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wait until rising_edge(clk);
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if RegDataEn = '1' then
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m_data <= din(7 downto 0);
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CtrlBits <= din(9 downto 8);
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Q := din;
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end if;
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m_data <= Q(7 downto 0);
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CtrlBits <= Q(9 downto 8);
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end process;
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CntAddr: process
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@@ -47,12 +54,89 @@ begin
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begin
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wait until rising_edge(clk);
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if CntAddrRst = '1' then
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cntVal := 0;
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cntVal := (others=>'0');
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elsif CntAddrEn = '1' then
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cntVal := cntVal + 1;
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end if;
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addr <= std_logic_vector(cntVal);
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end process;
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-- Prozesse fuer endlichen Automaten
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Transition: process(state, reset, m_ready, CtrlBits)
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begin
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-- Default-Werte fuer Folgezustand und Mealy-Ausgaenge
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state_next <= S_ERROR;
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CntAddrEn <= '0';
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CntAddrRst <= '0';
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-- Berechnung des Folgezustands und der Mealy-Ausgaenge
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case state is
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when S_ReadRom =>
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if reset = '1' then
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state_next <= S_ReadRom;
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CntAddrRst <= '1';
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else
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state_next <= S_ProvideData;
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end if;
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when S_ProvideData =>
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if reset = '1' then
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state_next <= S_ReadRom;
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CntAddrRst <= '1';
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elsif m_ready = '0' then
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state_next <= S_ProvideData;
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elsif m_ready = '1' then
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if CtrlBits = "10" then
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state_next <= S_DeadEnd;
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elsif CtrlBits = "00" then
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state_next <= S_ReadRom;
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CntAddrEn <= '1';
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elsif CtrlBits = "01" or CtrlBits = "11" then
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state_next <= S_ReadRom;
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CntAddrRst <= '1';
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end if;
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end if;
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when S_DeadEnd =>
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if reset = '1' then
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state_next <= S_ReadRom;
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CntAddrRst <= '1';
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else
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state_next <= S_DeadEnd;
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end if;
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when S_ERROR =>
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if reset = '1' then
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state_next <= S_ReadRom;
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CntAddrRst <= '1';
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else
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state_next <= S_ERROR;
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CntAddrEn <= 'X';
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CntAddrRst <= 'X';
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end if;
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end case;
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end process;
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-- Register fuer Zustand und Ausgaenge
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Reg: process
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begin
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wait until rising_edge(clk);
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-- Zustandswechsel
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state <= state_next;
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-- Berechnung der Moore-Ausgaenge
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-- Default-Werte
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m_valid <= '0';
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RegDataEn <= '0';
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case state_next is
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when S_ReadRom =>
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RegDataEn <= '1';
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when S_ProvideData =>
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m_valid <= '1';
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when S_DeadEnd =>
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null;
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when S_ERROR =>
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m_valid <= 'X';
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RegDataEn <= 'X';
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end case;
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end process;
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end architecture;
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@@ -91,7 +91,7 @@ begin
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end process;
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-- Prozesse fuer endlichen Automaten
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Transition: process(reset, CntSckTc, CntBitsTC, s_valid)
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Transition: process(state, reset, CntSckTc, CntBitsTC, s_valid)
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begin
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-- Default-Werte fuer Folgezustand und Mealy-Ausgaenge
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state_next <= S_ERROR;
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@@ -31,23 +31,40 @@ if {1} {
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}
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if {1} {
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add wave -divider "Interne Signale"
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add wave -noupdate -ascii /spi2display_tb/dut/SPI_Transmitter_Inst/data
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add wave -noupdate -hexadecimal /spi2display_tb/dut/SPI_Transmitter_Inst/addr
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add wave -divider "Steuerwerk"
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add wave -noupdate /spi2display_tb/dut/SPI_Transmitter_Inst/Steuerwerk/state
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add wave -noupdate /spi2display_tb/dut/SPI_Transmitter_Inst/Steuerwerk/state_next
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add wave -divider "Steuersignale"
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add wave -noupdate -divider {Interne Signale}
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add wave -noupdate /spi2display_tb/dut/addr
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add wave -noupdate -radix ascii /spi2display_tb/dut/data_rom
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add wave -noupdate -radix ascii /spi2display_tb/dut/data
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add wave -noupdate /spi2display_tb/dut/valid
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add wave -noupdate /spi2display_tb/dut/ready
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add wave -noupdate -divider spi_rom_control
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add wave -noupdate -divider Steuerwerk
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add wave -noupdate /spi2display_tb/dut/Control_Inst/state
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add wave -noupdate /spi2display_tb/dut/Control_Inst/state_next
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add wave -noupdate /spi2display_tb/dut/Control_Inst/CtrlBits
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add wave -noupdate /spi2display_tb/dut/Control_Inst/CntAddrEn
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add wave -noupdate /spi2display_tb/dut/Control_Inst/CntAddrRst
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add wave -noupdate /spi2display_tb/dut/Control_Inst/RegDataEn
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add wave -noupdate -divider Rechenwerk
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add wave -noupdate -label RegData -radix ascii /spi2display_tb/dut/Control_Inst/RegData/Q
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add wave -noupdate -label CntAddr /spi2display_tb/dut/Control_Inst/CntAddr/cntVal
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}
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if {1} {
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add wave -noupdate -divider Steuerwerk
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add wave -noupdate /spi2display_tb/dut/SPI_Transmitter_Inst/state
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add wave -noupdate /spi2display_tb/dut/SPI_Transmitter_Inst/state_next
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add wave -noupdate /spi2display_tb/dut/SPI_Transmitter_Inst/CntSckTc
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add wave -noupdate /spi2display_tb/dut/SPI_Transmitter_Inst/CntBitsTC
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add wave -noupdate /spi2display_tb/dut/SPI_Transmitter_Inst/CtrlBits
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add wave -noupdate /spi2display_tb/dut/SPI_Transmitter_Inst/cntAddrEn
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add wave -noupdate /spi2display_tb/dut/SPI_Transmitter_Inst/cntAddrRst
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add wave -noupdate /spi2display_tb/dut/SPI_Transmitter_Inst/CntSckRst
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add wave -noupdate /spi2display_tb/dut/SPI_Transmitter_Inst/RegDataLd
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add wave -noupdate /spi2display_tb/dut/SPI_Transmitter_Inst/RegDataShift
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add wave -noupdate /spi2display_tb/dut/SPI_Transmitter_Inst/RegDataEn
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add wave -noupdate /spi2display_tb/dut/SPI_Transmitter_Inst/CntBitsEn
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add wave -divider "Rechenwerk"
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add wave -noupdate -unsigned -label CounterBits /spi2display_tb/dut/SPI_Transmitter_Inst/Rechenwerk/CntBits/cntVal
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add wave -noupdate /spi2display_tb/dut/SPI_Transmitter_Inst/CntBitsTC
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add wave -noupdate /spi2display_tb/dut/SPI_Transmitter_Inst/CntBitsRst
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add wave -noupdate -divider Rechenwerk
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add wave -noupdate -label RegData /spi2display_tb/dut/SPI_Transmitter_Inst/RegData/Q
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add wave -noupdate -label CntSck /spi2display_tb/dut/SPI_Transmitter_Inst/CntSck/cntVal
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add wave -noupdate -label CntBits /spi2display_tb/dut/SPI_Transmitter_Inst/CntBits/cntVal
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}
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run 1000 us
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